“CPUs are boring, nothing much happens anymore” is a claim Daniel Lemire keeps hearing. Three comparable 8-core Ryzen 7 chips with 3D V-Cache, two years apart, are his answer: the 2024 9800X3D (Zen 5) beats the 2022 5800X3D (Zen 3) by 47% single-core and 58% multi-core on Geekbench 6.
The clock did almost none of that work:
- Max boost: 4.5 GHz → 5.0 GHz → 5.2 GHz, a 15% increase
- Transistors: roughly 11 billion → 16 billion, and most of the added transistors went into the core, not the cache
So where did the other ~35 points come from? Making the core wider — doing more per cycle instead of cycling faster:
- Dispatch width: 6 → 8 instructions per cycle
- Integer ALUs: 4 → 6
- Reorder buffer: 256 → 320 → 448 entries, so more instructions stay in flight and schedule better
- L2 per core: 512 KB → 1 MB; L1 data: 32 KB → 48 KB
- SIMD: four 256-bit units became four 512-bit units, with 2 × 512-bit loads and 1 × 512-bit store per cycle
That last row is the one most likely to touch your code. A CPU whose vector units and loads are 512-bit wide makes 256-bit assumptions look like the new “leaving half the machine idle” — the same widening story the Go team is chasing from the software side with portable SIMD.
Two other things worth taking from the post. First, “CPUs are stagnant” and “clocks are stagnant” are different claims, and the second one is now hiding a healthy amount of the first. Second, Geekbench is a synthetic aggregate: the real value here is the inventory of what changed and by how much, not the score — a latency-bound or bandwidth-bound workload will move by a different number, and the top comments argue memory bandwidth, not compute width, is what starves most real work. Zen 6 with a 256-core Epyc “Venice” and up to a gigabyte of L3 is next.